Projects need to be supported by an ecosystem.
High level Synthesis from C to Verilog and VHDL
Migen HDL programming Language Link
first steps of a VHDL frontend for Yosys Link
integrated graphical development environment for simple
Verilog project iceStudio
FPGA content visualisation tool DROM
Verilog Syntax highlighting in ATOM editor
Verilog Simulation with
Python to Verilog programming generator Chips
FuseSoC is a package manager and a set of build tools for HDL (Hardware Description Language) code and does support icoBoard as target plattform.
IP-XACT Standard and why to use it
Kactus2 IP-Xact tool
Eclipse based Verilog FPGA development environment
High Level Synthesis language generating Verilog
continuous integration with Jenkins
Programming environment and language MIGEN
simple IDE for myHDL based FPGA programming
embedded IDE with support of FPGA programming Platform.IO
non-free C to Verilog compiler LegUp
commercial Verilog editor Sigasi
"The most important thing to know about HLS tools is that imo they are marketed using a ridiculous claim: That you can simply take existing C/C++ code and convert it into an FPGA core without experience in digital design. This is of course nonsense! Like with Verilog or VHDL, you have to actually understand how the tool transforms your code into a digital circuit, and arguably this is even harder with HLS tools."
C coding style Video