this is for

Verilog programmers


Projects need to be supported by an ecosystem.

High level Synthesis from C to Verilog and VHDL  Link

Migen HDL programming Language Link

first steps of a VHDL frontend for Yosys  Link

integrated graphical development environment for simple Verilog project iceStudio

FPGA content visualisation tool DROM 

Verilog Syntax highlighting in ATOM editor

Verilog Simulation with cocotb

Python to Verilog programming generator Chips 2.0

FuseSoC is a package manager and a set of build tools for HDL (Hardware Description Language) code and does support icoBoard as target plattform.

IP-XACT Standard and why to use it

Kactus2 IP-Xact tool

Eclipse based Verilog FPGA development environment Link

High Level Synthesis language generating Verilog SpinalHLS

continuous integration with Jenkins

Programming environment and language MIGEN

simple IDE for myHDL based FPGA programming 

making Interfacing CPU with FPGA easier with Connectal and their webpage

embedded IDE with support of FPGA programming Platform.IO

non-free C to Verilog compiler LegUp

Arduino Core extentions for Risc-V CPU

commercial Verilog editor Sigasi

Verilog editor plug in for Eclipse with Icarus and GTKWave integration

Clifford Wolf:

"The most important thing to know about HLS tools is that imo they are marketed using a ridiculous claim: That you can simply take existing C/C++ code and convert it into an FPGA core without experience in digital design. This is of course nonsense! Like with Verilog or VHDL, you have to actually understand how the tool transforms your code into a digital circuit, and arguably this is even harder with HLS tools."

C coding style Video

The dependencies in the Linux ecosystem