How to get an icoBoard?
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The icoBOARD contains a Lattice FPGA with 8k LUT, 100MHz max clock, 1MBit of SRAM and is programmable in Verilog by a complete open source FPGA toolchain.
The icoTC (toolchain consisting of Yosys and ArachnePnR and icetools) for the Lattice ICE40 series does support all chip components like PLLs, Block RAMs, the WARMBOOT macro, dedicated carry logic, and PIO blocks. The icoBoard is pincompatible with the RaspberryPi 2B. The icoTC can generate bitstream-files directly on the RaspberryPi.
The icoBoard can be operated stand alone. Up to 200 IO Pins or 20 PMOD modules can be connected to the icoBOARD. 3 Flatflex connectors are available to connect additional boards.
For people already having an icoBoard_Beta, please see
Feb 2016: BQ, the spanish mobilephone manufacturer, is building a Lattice based Arduinoboard using the icoTC.
Feb 2016: The first commercial product using the icoTC
will be the Wiggleport
Feb 2016: Silego Technologies as a
manufacturer of programmable chips will work with us to
support their chips in our toolchain.
Feb 2016: You want to work on a Verilog project during
"Google Summer of Code" using Yosys and ArachnePnR? Get
in contact with us.
Jan 2016: We will be at Embedded World in Nürnberg from 23-26 Feb
Jan 2016: We will be at Fosem 2016 in Brussels Link
Jan 2016: Clifford managed to finalize the timing analysis for the FPGA:
Jan 2016: We are shipping out Beta boards to developers